UM3682AH-bus transceiver-Interface-Products-Union Semiconductor

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Reliability Report

	Outline-SSOP8.pdf
	Land Pattern-SSOP8.pdf

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Key Specifications

Part Number	Description	Status	VCCA(Min)(V)	VCCA(Max)(V)	VCCB(Min)(V)	VCCB(Max)(V)	Max Data Rate(Mbps)	No. of Bits	Operating Temperature Range(℃)	Pin/Package	EV Kit Available?
UM3682AH	2-Bit, 2- Supply, Bus Transceiver with Configurable Level-Shifting and Translation and 3-state Outputs	ACTIVE	1.2	3.6	1.2	3.6		2	-40 to 85	SSOP8

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Product Description

This 2-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A ports are designed to track V_CCA and accepts any supply voltage from 1.2V to 3.6V. The B ports are designed to track V_CCB and accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation and level-shifting between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes. The UM3682 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B port outputs or the A port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A port outputs are activated.

The UM3682AH features active bus-hold circuitry，which holds unused or un-driven inputs at a valid logic state. Union does not recommend using pull-up or pull-down resistors with the bus-hold circuitry.

Features

- Input Voltage Range: 1.8V to 8V

- V_CC Isolation

- 2-Rail Design

- I/Os are 4.6V Tolerant

- Partial Power-Down-Mode Operation

- Bus Hold on Data Inputs

- Maximum Data Rates

-500 Mbps (1.8V to 3.3V)

-320 Mbps (<1.8V to 3.3V)

-320 Mbps (Level-Shifting to 2.5V or 1.8V)

-280 Mbps (Level-Shifting to 1.5V)